Patrick R. Schaumont
Mailing Address:302 Whittemore (0111)
Blacksburg, VA 24061
(540) 231-3553 (540) 231-3362 email@example.com
Affiliated Research Group:
Ph.D., Electrical Engineering, University of California at Los Angeles, 2004Licenciaat degree in de Informatica, University of Ghent, Belgium, 1990Industrieel Ingenieur Electronica, Industriele Hogeschool van het Rijk, Ghent, Belgium, 1988
- ECE/CS 5580: Cryptographic Engineering
- ECE 5520: Secure Hardware Design
- ECE 4530: Hardware/Software Codesign
My research covers design and implementation aspects of security in embedded systems design. This includes secure protocols and cryptography implemented in embedded hardware and software and countermeasures against implementation attacks. I am interested in all abstraction levels of design, including circuits, hardware micro-architecture, firmware, and platform-specific software. I am also working on methodologies, with a focus on the trade-off between system performance, system cost, and system security.
C. Patrick, B. Yuce, N. Farhady Ghalaty, P. Schaumont, "Lightweight Fault Attack Resistance in Software Using Intra-Instruction Redundancy," Selected Areas in Cryptography (SAC 2016), St. John's, Canada, August 2016. (preprint on IACR ePrint 2016/850).
B. Yuce, N. Farhady Ghalaty, H. Santapuri, C. Deshpande, C. Patrick, P. Schaumont, "Software Fault Resistance is Futile: Effective Single-glitch Attacks," Fault Diagnosis and Tolerance in Cryptography (FDTC 2016), Santa Barbara, CA, August 2016.
B. Yuce, N. Farhady Ghalaty, C. Deshpande, C. Patrick, L. Nazhandali, P. Schaumont, "FAME: Fault-attack Aware Microprocessor Extensions for Hardware Fault Detection and Software Fault Response," ACM Hardware and Architectural Support for Security and Privacy (HASP) 2016, Seoul, Korea, June 2016. pdf, doi
A. Aysu, P. Schaumont, "Precomputation Methods for Hash-based Signatures on Energy-Harvesting Platforms" IEEE Transactions on Computers, 65(9):2925-2931, September 2016. doi
H. Eldib, C. Wang, M. Taha, P. Schaumont, "Quantitative Masking Strength: Quantifying the Power Side-Channel Resistance of Software Code," IEEE Transactions on Computer Aided Design of Integrated Circuits and Systems, preprint. doi
M. Taha, P. Schaumont, "Key-Updating for Leakage Resiliency with Application to AES Modes of Operation," IEEE Transactions on Information Forensics & Security, 10(3):519-528, March 2015. doi
A. Aysu, E. Gulcan, P. Schaumont, "SIMON Says, Break Area Records of Block Ciphers on FPGAs," IEEE Embedded Systems Letters, 6(2):37-40, April 2014. doi
A. Maiti, P. Schaumont, "The Impact of Aging on a Physical Unclonable Function", IEEE Transactions on Very Large Scale Integration (VLSI) Systems, preprint. doi
Z. Chen, A. Sinha, P. Schaumont "Using Virtual Secure Circuit to Protect Embedded Software from Side-Channel Attacks", IEEE Trans. Computers 62(1): 124-136 (2013). doi