Researchers in ECE's Microelectromechanical Systems (MEMS) lab are working on a new way of cooling three dimensional integrated circuits (ICs). According to Masoud Agah, who leads the project, "stacking of silicon layers to create three dimensional integrated circuits has been considered a promising approach to reduce interconnect delays, increase transistor density, and reduce chip area."
However, the heat produced by these new three-dimensional ICs is an obstacle. The heat of an IC increases with the number of layers, but the surface area available for cooling remains unchanged. The team is investigating how to cool these ICs by integrating microchannels into the design.
The microchannels "require fewer masks and fewer process steps than previous methods," says Agah, "furthermore, three different channel geometries were simulated using computational fluid dynamics to prove that channels fabricated using this method could adequately cool future integrated circuits." Physical testing verified these simulations. Of the three geometries they are working with, the micro-fin geometry has the highest heat transfer capability and lowest simulated substrate temperatures.