ECE: Electrical & Computer Engineering

ECE 5514 Design of Systems on a Chip

Fall 2016 textbook list

The Fall 2016 ECE textbook list is available online for students.

Current Prerequisites & Course Offering

For current prerequisites for a particular course, and to view course offerings for a particular semester, see the Virginia Tech Course Timetables.

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ECE 5514 Design of Systems on a Chip (3C)

Current state of the art in the system-level design of Systems on a Chip. The focus is in the hardware, scheduling, and applications at the highest levels of design.

What is the reason for this course?

The combination of single-chip transistor desnity, size, and power constraints, and the end of an era of steady growth of performance for single core processors has led to the era of Systems on a Chip in which multiple cores cooperate to carry out some computing goal. Currently, the questions outpace the solutions in this area of research, even though there is a body of research that has begun on Systems on a Chip and multi-core computing in the past decade. This course is structured to ehlp students understand the state of the art of Systems on a Chip design and, in so doing, prepare them to critically evaluate future research as it develops over the next decades.

Typically offered: Fall, Spring. Program Area: Computers.

Prerequisites: Graduate Standing.

Why are these prerequisites or corequisites required?

This course is proposed at the graduate level because it builds on a broader range of material taught at the advanced undergraduate level.

Department Syllabus Information:

Major Measurable Learning Objectives:
Course Topics
Topic Percentage
1. Applications - emerging trends in contrast to specifications and benchmark suites 20%
2. Architectures - networks on chip and multi-core organization 20%
3. Design - the impact of simulation and modeling 20%
4. Evaluation - performance as speed (latency and throughput), power, size and other 20%
5. Trends Justification - numerical quantification of and written justification of the impact of changes in relationships between Applications, Architectures, Design and Evaluation 20%

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