The BRADLEY DEPARTMENT of ELECTRICAL and COMPUTER ENGINEERING

Graduate PROGRAMS

Course Information

Description

Various topics on digital circuit testing and verification. 5505: digital circuit testing including simulation, test pattern generation, design for testability, built-in-self-test, and diagnosis.

Why take this course?

5505 will provide the fundamental and state-of-the-art methods and knowledge on testing of digital systems, and 5506 will provide the fundamental and state-of-the-art techniques and knowledge for verification of electronic systems. As the number of gates on a chip increases drastically, testing of the manufactured chip becomes an important issue in circuit and system design. In order to test circuits/systems effectively, computer engineers need to understand various techniques of circuit testing. 5505 meets the need by teaching both basic and advanced concepts and underlying theories of circuit testing from the system level down through the gate level. Design verification has recently become a bottle-neck in the design process. Failure to detect errors early in the design stage can be prohibitively expensive to change late in the cycle. 5506, the verification portion of the course, emphasizes techniques and approaches to efficiently check if the circuit implementation is correct.

Prerequisites

Graduate Standing in ECE

5505 will provide the fundamental and state-of-the-art methods and knowledge on testing of digital systems, and 5506 will provide the fundamental and state-of-the-art techniques and knowledge for verification of electronic systems. As the number of gates on a chip increases drastically, testing of the manufactured chip becomes an important issue in circuit and system design. In order to test circuits/systems effectively, computer engineers need to understand various techniques of circuit testing. 5505 meets the need by teaching both basic and advanced concepts and underlying theories of circuit testing from the system level down through the gate level. Design verification has recently become a bottle-neck in the design process. Failure to detect errors early in the design stage can be prohibitively expensive to change late in the cycle. 5506, the verification portion of the course, emphasizes techniques and approaches to efficiently check if the circuit implementation is correct.

Major Measurable Learning Objectives

  • explain the relationship between physical failures and fault models,
  • design efficient logic and fault simulators,
  • generate test patterns using various techniques
  • distinguish various design for testability methods,
  • formulate diagnosis approaches,
  • compute testing objectives from high-level descriptions.

Course Topics

Topic

Percentage of Course

Intro & Logic Simulation 10%
Physical Failures, Fault Models & Fault Simulation 15%
Combinational Test Pattern Generation 15%
Sequential Test Pattern Generation 15%
Test Set Compaction 10%
Functional and Hierarchical Test Pattern Generation 10%
Design for Testability & Built-In-Self-Test 15%
Diagnosis 10%