Patrick Schaumont
Publications

2014

M. Taha, P. Schaumont, "Key-Updating for Leakage Resiliency with Application to AES Modes of Operation," IEEE Transactions on Information Forensics & Security, to appear.

H. Eldib, C. Wang, P. Schaumont, "SMT-Based Verification of Software Countermeasures against Side-Channel Attacks," ACM Transactions on Software Engineering and Methodology, to appear.

R. S. Chakraborty, V. Matyas, P. Schaumont, Patrick (Eds.), "Security, Privacy, and Applied Cryptography Engineering," 4th International Conference, SPACE 2014, Pune, India, October 18-22, 2014. Lecture Notes in Computer Science 8804, ISBN 978-3-319-12060-7.

pdf E. Gulcan, A. Aysu, P. Schaumont, "A Flexible and Compact Hardware Architecture for the SIMON Block Cipher,", Third International Workshop on Lightweight Cryptography for Security & Privacy (LightSec 2014), Istanbul, Turkey, September 2014.

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N. F. Ghalaty, B. Yuce, M. Taha, P. Schaumont, "Differential Fault Intensity Analysis,", 11th Workshop on Fault Diagnosis and Tolerance in Cryptography (FDTC 2014), Busan, Korea, September 2014.

doi Y. Xu, I. Kim, P. Schaumont, "Adaptive Bayes sum test for the equality of two nonparametric functions,", Journal of Applied Statistics, 2014.

pdf K. Pabbuleti, D. Mane, P. Schaumont, "Energy Budget Analysis for Signature Protocols on a Self-Powered Wireless Sensor Node,", 10th Workshop on RFID Security (RFIDSec 2014), Oxford, UK, July 2014.

doi A. Aysu, E. Gulcan, P. Schaumont, "SIMON Says, Break Area Records of Block Ciphers on FPGAs,", IEEE Embedded Systems Letters, 6(2):37-40, April 2014.

doi H. Eldib, C. Wang, M. Taha and P. Schaumont, "QMS: Evaluating the side-channel resistance of masked software from source code", ACM/IEEE Design Automation Conference (DAC 14). San Francisco, CA, June 2014.

doi M. Taha and P. Schaumont, "Side-Channel Countermeasure for SHA-3 at Almost-Zero Area Overhead", IEEE Symposium on Hardware Oriented Security and Trust (HOST 2014), Arlington, VA, May 2014.

doi H. Eldib, C. Wang and P. Schaumont, "SMT-Based Verification of Software Countermeasures against Side-Channel Attacks", 20th International Conference on Tools and Algorithms for the Construction and Analysis of Systems (TACAS 14), Grenoble, France, April 2014.

doi N.F. Ghalaty, A. Aysu, P. Schaumont, "Analyzing and Eliminating the Causes of Fault Sensitivity Analysis", Design, Automation & Test in Europe (DATE 2014), Dresden, Germany, March 2014.

2013

doi A. Aysu, P. Schaumont, "PASC: Physically Authenticated Stable-Clocked SoC Platform on Low-Cost FPGAs", 2013 International Conference on Reconfigurable Computing and FPGAs, December 2013.

doi A. Maiti, P. Schaumont, "The Impact of Aging on a Physical Unclonable Function", IEEE Transactions on Very Large Scale Integration (VLSI) Systems, preprint.

pdf M. Taha, P.Schaumont, "Differential Power Analysis of MAC-Keccak at Any Key-Length," 8th International Workshop on Security (IWSEC2013), Okinawa, Japan, November 2013.

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P. Schaumont, A. Aysu, "Three Design Dimensions of Secure Embedded Systems," Third International Conference on Security, Privacy, and Applied Cryptography Engineering(SPACE 2013), Kharagpur, India, October 2013.

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A. Aysu, N. Ghalaty, Z. Franklin, M. Yali, P. Schaumont "Digital Fingerprints for Low-Cost Platforms using MEMS sensors," 8th Workshop on Embedded Systems Security (WESS 2013), Montreal, Canada, September 2013.

pdf K. Pabbuleti, D. Mane, A. Desai, C. Albert, P. Schaumont, "SIMD Acceleration of Modular Arithmetic on Contemporary Embedded Platforms," 2013 IEEE High Performance Extreme Computing Conference (HPEC'13), Waltham, MA, September 2013.

pdf D. Mane, P. Schaumont, "Energy-Architecture Tuning for ECC-based RFID Tags", 9th Workshop on RFID Security (RFIDSec 2013), Graz, Austria, July 2013.

pdf A. Aysu, C. Patterson, P. Schaumont, "Low-Cost and Area-Efficient FPGA Implementations of Lattice Based Cryptography",IEEE International Symposium on Hardware-Oriented Security and Trust (HOST 2013), Austin, TX, June 2013.

pdf M. Taha, P. Schaumont, "Side-channel Analysis of MAC-Keccak",IEEE International Symposium on Hardware-Oriented Security and Trust (HOST 2013), Austin, TX, June 2013.

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P. Schaumont, I. Verbauwhede, "The Exponential Impact of Creativity on Computer-Engineering Education", International Conference on Micro-Electronic Systems Education 2013, Austin, TX, June 2013.

doi E. Prouff, P. Schaumont, "Introduction to the CHES 2012 special issue", Journal of Cryptographic Engineering, 3(1):1, Springer, 2013.

doi M. Srivastav, Y. Zuo, X. Guo, L. Nazhandali, P. Schaumont, "Study of ASIC Technology Impact Factors on Performance Evaluation of SHA-3 Candidates", 23rd Great Lakes Symposium on VLSI (GLSVLSI), Paris, France, May 2013.

pdf P. Schaumont, "Teaching Cyber-physical Systems in Layers", First Workshop on Cyber-Physical Systems Education (CPS-Ed 2013), Philadelpha, PA , April 2013.

doi Z. Chen, A. Sinha, P. Schaumont "Using Virtual Secure Circuit to Protect Embedded Software from Side-Channel Attacks", IEEE Trans. Computers 62(1): 124-136 (2013).

2012

doi P. Schaumont, "A Practical Introduction to Hardware/Software Codesign - 2nd Edition", Springer 2013, ISBN 978-1-4614-3736-9.

doi E. Prouff, P. Schaumont (Eds.),"Cryptographic Hardware and Embedded Systems - CHES 2012 - 14th International Workshop", Leuven, Belgium, September 9-12, 2012. Proceedings. Lecture Notes in Computer Science 7428, Springer 2012, ISBN 978-3-642-33026-1.

pdf L. Judge, M. Cantrell, C. Kendir, P. Schaumont, "A Modular Testing Environment for Implementation Attacks," Workshop on Redefining and Integrating Security Engineering at ASE/IEEE International Conference on Cyber Security 12 (RISE), December 2012.

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L. Judge, S.Mane, P. Schaumont, "A Hardware Accelerated ECDLP with High-performance Modular Multiplication," International Journal of Reconfigurable Computing (IJRC), Hindawi Publishers, September 2012.

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M. Taha, P. Schaumont, "A Novel Profiled Attack in the Presence of High Algorithmic Noise," International Conference on Computer Design (ICCD 2012), September 2012.

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S. Mane, M. Taha, P. Schaumont, "Efficient and Side-Channel-Secure Block Cipher Implementation with Custom Instructions on FPGA," International Conference on Field Programmable Logic and Applications (FPL 2012), August 2012.

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A. Maiti, P. Schaumont, "A Novel Microprocessor-intrinsic Physical Unclonable Function," International Conference on Field Programmable Logic and Applications (FPL 2012), August 2012.

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M. Srivastav, X. Guo, S. Huang, D. Ganta, M. B. Henry, L. Nazhandali, and P. Schaumont, "Design and Benchmarking of an ASIC with Five SHA-3 Finalist Candidates," Elsevier Microprocessors and Microsystems - Embedded Hardware Design (Special Issue on "Digital System Security and Safety"), 2012.

doi A. Maiti, V. Gunreddy, P. Schaumont, "A Systematic Method to Evaluate and Compare the Performance of Physical Unclonable Functions," Chapter 11 in "Embedded System Design with FPGAs," Eds. P. Athanas, D. Pnevmatikatos, N. Sklavos, Springer 2012, ISBN 978-1-4614-1361-5.

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J. Zhang, S. Iyer, P. Schaumont, Y. Yang, "Simulating Power/Energy Consumption of Sensor Nodes with Flexible Hardware in Wireless Networks," 9th Annual IEEE Communications Society Conference on Sensor, Mesh and Ad Hoc Communications and Networks (SECON), 2012.

pdf L. Judge, P. Schaumont, "A Flexible Hardware ECDLP Engine in Bluespec," Special-Purpose Hardware for Attacking Cryptographic Systems (SHARCS 2012), Washington, DC, March 2012.

pdf X. Guo, M. Srivistav, S. Huang, D. Ganta, M. B. Henry, L. Nazhandali, and P. Schaumont, "ASIC Implementations of Five SHA-3 Finalists," Design, Automation and Test in Europe (DATE2012), March 2012.

doi A. Maiti, I. Kim and P. Schaumont, "A Robust Physical Unclonable Function with Enhanced Challenge-Response Set," IEEE Transactions on Information Forensics and Security, 7(1):333-345, February 2012.

2011

pdf A. Maiti, V. Gunreddy, P. Schaumont, "A Systematic Method to Evaluate and Compare the Performance of Physical Unclonable Functions", IACR ePrint 2011/657, November 2011.

pdf X. Guo, P. Schaumont, "The Technology Dependence of Lightweight Hash Implementation Cost", Ecrypt II 2011 Workshop on Lightweight Cryptography, November 2011.

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S. Mane, L. Judge, P. Schaumont, "An Integrated Prime-field ECDLP Hardware Accelerator with High-performance Modular Arithmetic Units," 2011 International Conference on Reconfigurable Computing and FPGAs (RECONFIG), December 2011.

doi P. Schaumont, Z. Chen, "Side-channel Attacks and Countermeasures for Embedded Microcontrollers," in Introduction to Hardware Security and Trust, Eds M. Tehranipoor, C. Wang, 263-282, Springer.

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A. Maiti, L. McDougall and P. Schaumont, "The Impact of Aging on An FPGA-Based Physical Unclonable Function," 21st International Conference on Field Programmable Logic and Applications (FPL 2011), September 2011. Best Paper Award.

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X. Guo, Meeta Srivistav, S. Huang, D. Ganta, M. Henry, L. Nazhandali, and P. Schaumont, "Pre-silicon Characterization of NIST SHA-3 Final Round Candidates", 14th Euromicro Conference on Digital System Design Architectures, Methods and Tools (DSD 2011), August 2011.

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S. Iyer, J. Zhang, Y. Yang, and P. Schaumont, "A Unifying Interface Abstraction for Accelerated Computing in Sensor Nodes," 2011 Electronic System Level Synthesis Conference, San Diego, June 2011.

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J. Zhang, Y. Tang, S. Hirve, S. Iyer, P. Schaumont, Y. Yang, "A Software-Hardware Emulator for Sensor Networks," 8th Annual IEEE Communications Society Conference on Sensor, Mesh and Ad Hoc Communications and Networks, June 2011. Best Paper Award.

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S. Morozov, C. Tergino, P. Schaumont, "System Integration of Elliptic Curve Cryptography on an OMAP Platform," 9th IEEE Symposium on Application Specific Processors, June 2011.

pdf X. Guo, M. Srivastav, S. Huang, D. Ganta, M. Henry, L. Nazhandali, P. Schaumont, "Silicon Implementation of SHA-3 Finalists: BLAKE, Groestl, JH, Keccak and Skein," ECRYPT II Hash Workshop 2011, May 2011.

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A. Maiti, P. Schaumont, "Improved Ring Oscillator PUF: An FPGA-Friendly Secure Primitive," IACR Journal of Cryptology, special issue on Secure Hardware, 24(2), April 2011, Springer.

pdf Z. Chen, X. Guo, A. Sinha, and P. Schaumont, "Data-Oriented Performance Analysis of SHA-3 Candidates on FPGA Accelerated Computers" Design, Automation and Test in Europe (DATE2011), March 2011.

2010

pdf X. Guo, S. Huang, L. Nazhandali, P. Schaumont, "On The Impact of Target Technology in SHA-3 Hardware Benchmark Rankings," IACR ePrint 2010/536, October 2010.

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A. Sinha, Z. Chen, P. Schaumont, "A Comprehensive Analysis of Performance and Side-Channel Leakage of AES SBOX Implementations in Embedded Software," Fifth Workshop on Embedded Systems Security (WESS'2010), Scottsdale, AZ, October 2010.

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Z. Chen, P. Schaumont, "A Parallel Implementation of Montgomery Multiplication on Multi-core Systems: Algorithm, Analysis, and Prototype," IEEE Transactions on Computers, 60(12):1692-1703, December 2011.

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M. Gora, A. Maiti, P. Schaumont, "A Flexible Design Flow for Software IP Binding in FPGA," IEEE Transactions on Industrial Informatics, November 2010.

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Z. Chen, A. Sinha, P. Schaumont, "Implementing Virtual Secure Circuit using a Custom-Instruction Approach," International Conference on Compilers, Architecture and Synthesis for Embedded Systems (CASES 2010), Scottsdale, AZ, October 2010.

pdf X. Guo, S. Huang, L. Nazhandali, P. Schaumont, "Fair and Comprehensive Performance Evaluation of 14 Second Round SHA-3 ASIC Implementations", NIST 2nd SHA-3 Candidate Conference, Santa Barbara, CA, August 2010.

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A. Maiti, J. Casarona, L. McHale, P. Schaumont "A Large Scale Characterization of RO-PUF," IEEE International Symposium on Hardware-Oriented Security and Trust (HOST 2010), Anaheim, June 2010.

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J. Fan, X. Guo, E. De Mulder, P. Schaumont, B. Preneel, and I. Verbauwhede, "State-of-the-art of secure ECC implementations: a survey on known side-channel attacks and countermeasures," IEEE International Symposium on Hardware-Oriented Security and Trust (HOST 2010), Anaheim, June 2010.

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I. Kim, A. Maiti, L. Nazhandali, P. Schaumont, V. Vivekraja, H. Zhang, "From Statistics to Circuits: Foundations for Future Physical Unclonable Functions," chapter in "Towards Hardware Intrinsic Security," eds. A. Sadeghi, Springer Information Security and Cryptography Series, Part 1, 55-78, 2010, Springer.

doi P. Schaumont, "A Practical Introduction to Hardware/Software Codesign," 2010, Springer Circuits and Systems Series, ISBN 978-1-4419-5999-7, July 2010.

pdf Z. Chen, P. Schaumont, "Virtual Secure Circuit: Porting Dual-Rail Pre-charge Technique into Software on Multicore," IACR ePrint Archive 2010/272, April 2010.

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X. Guo, P. Schaumont, "Optimized System-on-Chip Integration of a Programmable ECC Coprocessor," ACM Transactions on Reconfigurable Technology and Systems (TRETS), 4(1), Article 6, December 2010.

pdf Z. Chen, P. Schaumont, "pSHS: A Scalable Parallel Software Implementation of Montgomery Multiplication for Multicore Systems," Design, Automation and Test in Europe (DATE 2010), March 2010.

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S. Morozov, A. Maiti, P. Schaumont, "A Comparative Analysis of Delay Based PUF Implementations on FPGA," 6th International Symposium on Applied Reconfigurable Computing, March 2010.

2009

pdf S. Morozov, A. Maiti, P. Schaumont, "A Comparative Analysis of Delay Based PUF Implementations on FPGA," IACR ePrint Archive 2009/629, December 2009.

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X. Guo, J. Fan, P. Schaumont, I. Verbauwhede, "Programmable and Parallel ECC Coprocessor Architecture: Tradeoffs between Area, Speed and Security,,"Proc. of the IACR Workshop on Cryptographic Hardware and Embedded Systems (CHES 2009), September 2009.

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A. Maiti, P. Schaumont, "Improving the Quality of a Physical Unclonable Function using Configurable Ring Oscillators," 19th International Conference on Field Programmable Logic and Applications (FPL 2009), September 2009.

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Z. Chen, P. Schaumont, "Early Feedback on Side-Channel Risks with Accelerated Toggle-Counting," Proc. IEEE Workshop on Hardware Oriented Security and Trust (HOST 2009), July 2009.

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M. Gora, A. Maiti, P. Schaumont, "A Flexible Design Flow for Software IP Binding in Commodity FPGA," IEEE Symposium on Industrial Embedded Systems (SIES 2009), July 2009.

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Z. Chen, P. Schaumont, "Side-channel Leakage in Masked Circuits Caused by Higher-Order Circuit Effects," 3th International Conference on Information Security and Assurance (ISA 2009), June 2009.

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Z. Chen, R. Nagesh, A. Reddy, P. Schaumont, "Increasing the Sensitivity of On-Chip Digital Thermal Sensors with Pre-Filtering," IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2009), May 2009.

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A. Maiti, R. Nagesh, A. Reddy, P. Schaumont, "Physical Unclonable Function and True Random Number Generator: a Compact and Scalable Implementation," 19th Great Lakes Symposium on VLSI (GLSVLSI 2009), May 2009.

pdf X. Guo, P. Schaumont, "Optimizing the HW/SW Boundary of an ECC SoC Design Using Control Hierarchy and Distributed Storage," Design, Automation and Test in Europe (DATE2009), April 2009.

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P. Schaumont, A.K. Jones, S. Trimberger, "Guest Editors' Introduction to Security in Reconfigurable Systems Design," ACM Transactions on Reconfigurable Technology and Systems (TRETS), March 2009.

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X. Guo, P. Schaumont, "Optimizing the Control Hierarchy of an ECC Coprocessor Design on an FPGA based SoC Platform," 5th International Workshop on Applied Reconfigurable Computing (ARC2009), LNCS5453, pp. 169-180, Springer Verlag, March 2009.

doi A. Maiti, P. Schaumont, "Impact and Compensation of Correlated Process Variations on Ring Oscillator Based PUF," poster presentation, 17th International Symposium on Field Programmable Gate Arrays (FPGA 2009), February 2009.

2008

pdf Z. Chen, S. Morozov, P. Schaumont, "A Hardware Interface for Hashing Algorithms", ePrint IACR Archive, 2008/529, December 2008.

pdf P. Schaumont, "Hardware/Software Codesign is a Starting Point in Embedded Systems Architecture Education",ARTIST Workshop on Embedded Systems Education (WESE 2008), October 2008

pdf Z. Chen, P. Schaumont, "Improving Secure Hardware Masking using an Equalization Technique", ACM Workshop on Embedded Systems Security (WESS 2008), October 2008.

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X. Guo, Z. Chen, P. Schaumont, "Energy and Performance Evaluation of an FPGA-based SoC Platform with AES and PRESENT Coprocessors", International Workshop on Systems, Architectures, Modeling, and Simulation (SAMOS 2008), July 2008.

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M. Gora, E. Simpson, P. Schaumont, "Intellectual Property Protection for Embedded Sensor Nodes," International Workshop on Systems, Architectures, Modeling, and Simulation (SAMOS 2008), July 2008.

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Z. Chen, P. Schaumont, "Slicing Up a Perfect Hardware Masking Scheme", IEEE International Workshop on Hardware-Oriented Security and Trust, June 2008.

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P. Schaumont, K. Asanovic, J. Hoe, "MEMOCODE 2008 Co-Design Contest", Sixth ACM-IEEE International Conference on Formal Methods and Models for Codesign (MEMOCODE'2008), June 2008.

pdf P. Schaumont, E. Simpson, P. Yu, "A Video Interface with End-point Security,", Technical Report, ECE Department, Virginia Tech, January 2008.

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P. Schaumont, D. Hwang, "Turning Liabilities into Assets: Exploiting Deep-submicron CMOS Technology to Design Secure Embedded Circuits,", IEEE International Symposium on Circuits and Systems (ISCAS 08), May 2008, Seattle..

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P. Schaumont, "A Senior Level Course in Hardware/Software Codesign," IEEE Transactions on Education, Special Issue on Micro-Electronic Systems Education, 51(3):306-311, August 2008.

2007

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P. Schaumont, A. Raghunathan, "Guest Editor's Introduction: Security and Trust in Embedded-Systems Design," IEEE Design and Test of Computers, Special Issue on Design and Test of ICs for Secure Embedded Computing, November/December 2007.

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P. Yu, P. Schaumont, "Secure FPGA Circuits using Controlled Placement and Routing," International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS 2007), October 2007.

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P. Schaumont, K. Tiri, "Masking and Dual-Rail Logic Don't Add Up," Workshop on Cryptographic Hardware and Embedded Systems (CHES 2007), September 2007.

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E. Simpson, P. Yu, P. Schaumont, S. Ahuja, S. Shukla, "VT Matrix Multiply Design for MEMOCODE 07," Fifth ACM-IEEE International Conference on Formal Methods and Models for Codesign (MEMOCODE'2007), Nice, France.

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P. Schaumont, "A Senior Level course in hardware-software codesign," International Conference on Microelectronic Systems Education (MSE 2007), San Diego, June 2007.

pdf I. Verbauwhede, P. Schaumont, "Design Methods for Security and Trust," Design Automation and Test Conference in Europe (DATE 2007), Nice, France, April 2007.

pdf D. Ha, P. Schaumont, "Replacing Cryptography with Ultra Wideband (UWB) Modulation in Secure RFID," IEEE International Conference on RFID 2007, Grapevine, TX, March 2007.

pdf P. Schaumont, I. Verbauwhede, "Hardware/Software Codesign for Stream Ciphers," SASC (State of the Art of Stream Ciphers), Special workshop hosted by the ECRYPT Network of Excellence in Cryptology, Bochum, Germany, January 2007.

2006

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E. Simpson, P. Schaumont, "Offline HW/SW Authentication for Reconfigurable Platforms," Workshop on Cryptographic Hardware and Embedded Systems 2006 (CHES 06), Yokohama, Japan, October 2006.

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P. Schaumont, D. Hwang, S. Yang, I. Verbauwhede, "Multi-level Design Validation in a Secure Embedded System," IEEE Transactions on Computers, special issue HLDVT 2005, October 2006.

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P. Schaumont, I. Verbauwhede, "A Component-based Design Environment for Electronic System-level Design," IEEE Design and Test of Computers, special issue on Electronic System-Level Design, 23(5), pp. 338-347, September-October 2006.

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K. Tiri, P. Schaumont, "Changing the odds against masked logic," 13th Annual Workshop on Selected Areas in Cryptography, Montreal, Canada, 2006.

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B.C. Lai, P. Schaumont, W. Qin, I. Verbauwhede, "Cross Layer Design to Multi-thread a Data-Pipelining Application on a Multi-processor on Chip," IEEE 17th INTERNATIONAL CONFERENCE ON Application-specific Systems, Architectures and Processors (ASAP), pp.15-18, Steamboat Springs, Colorado, September 2006.

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P. Yu, P. Schaumont, "Executing Hardware as Parallel Software for Picoblaze Networks," 16th International Conference on Field Programmable Logic and Applications (FPL 2006), Madrid, Spain, August 2006.

pdf P. Yu, P. Schaumont, D. Ha, "Securing RFID with Ultra-Wideband Modulation," 2nd Workshop on RFID Security (RFIDSec 2006), Graz, Austria, July 2006.

pdf H. Chan, P. Schaumont, I. Verbauwhede, "Process Isolation for Reconfigurable Hardware," 2006 International Conference on Engineering of Reconfigurable Systems & Algorithms, June 2006. (distinguished paper).

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D. Ching, P. Schaumont, and I. Verbauwhede, "Integrated modeling and generation of a reconfigurable network-on-chip," Int. J. Embedded Systems, Vol. 1, Nos. 3/4, 2005, p. 218-227.

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K. Tiri, P. Schaumont, I. Verbauwhede, "Side-Channel Leakage Tolerant Architectures" third International Conference in Information Technology: New Generations (ITNG), Las Vegas, NV, April 2006.

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D. Hwang, K. Tiri, A. Hodjat, B.C. Lai, S. Yang, P. Schaumont, I. Verbauwhede, "AES-Based Security Coprocessor IC in 0.18um CMOS with resistance to differential power analysis side-channel attacks," IEEE Journal of Solid-State Circuits, 41(4), April 2006.

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I. Verbauwhede, K. Tiri, D. Hwang, and P. Schaumont, "Circuits and design techniques for secure ICs resistant to side-channel attack," International Conference on IC Design and Technology (ICICDT 2006).

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D. Hwang, P. Schaumont, K. Tiri, I. Verbauwhede, "Securing Embedded Systems," IEEE Security and Privacy Magazine, March-April 2006.

pdf P. Schaumont, S. Shukla, I. Verbauwhede, "Design with race-free hardware semantics", 2006 Design Automation and Test in Europe (DATE) Conference, Munich, March 2006.

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P. Schaumont, D. Ching, I. Verbauwhede, "An Interactive Codesign Environment for Domain-specific Coprocessors," ACM Transactions on Design Automation of Electronic Systems, January, 2006.

2005

pdf P. Schaumont, D. Hwang, I. Verbauwhede, "Platform-based design for an embedded fingerprint authentication device," IEEE Transactions on Computer Aided Design of Integrated Circuits and Systems, 24(12):1929-1936, December 2005.

pdf D. Hwang, P. Schaumont, S. Yang, I. Verbauwhede, "Multi-level Design Validation in a Secure Embedded System," Proceedings of the 2005 High Level Design and Validation Workshop, November 2005.

pdf I. Verbauwhede, P. Schaumont, "Skiing the embedded systems mountain," ACM Transactions on Embedded Computing Systems (Special issue on embedded systems education), August 2005.

pdf B.C. Lai, P. Schaumont, I. Verbauwhede, "Energy and Performance Analysis of Mapping Parallel Multi-threaded Tasks for An On-Chip Multi-Processor System," IEEE International Conference on Computer Design (ICCD 2005), October 2005.

pdf B.C. Lai, P. Schaumont, I. Verbauwhede, "A Light-Weight Cooperative Multi-threading with Hardware Supported Thread-Management on an Embedded Multi-Processor System," Conference Record of the Thirty-Ninth Asilomar Conference on Signals, Systems and Computers, 2005, p. 1647-1651.

pdf S. Yang, P. Schaumont, and I. Verbauwhede, "Microcoded Coprocessor for Embedded Secure Biometric Authentication Systems," IEEE/ACM/IFIP International Conference on Hardware - Software Codesign and System Synthesis(CODES+ISSS'05), Sept. 2005.

pdf K. Tiri, D. Hwang, A. Hodjat, B.C. Lai, S. Yang, P. Schaumont, and I. Verbauwhede, "Prototype IC with WDDL and Differential Routing - DPA Resistance Assessment," Workshop on Cryptographic Hardware and Embedded Systems (CHES 2005), August 2005.

pdf P. Schaumont, S. Shukla, and I. Verbauwhede, "Extended Abstract: A Race-free Hardware Modeling Language," Third ACM-IEEE International Conference on Formal Methods and Models for Codesign (MEMOCODE'2005), July 2005.

pdf K. Tiri, D. Hwang, A. Hodjat, B.C. Lai, S. Yang, P. Schaumont, and I. Verbauwhede, "AES-Based Cryptographic and Biometric Security Coprocessor IC in 0.18-um CMOS Resistant to Side-Channel Power Analysis Attacks," 2005 Symposia on VLSI Technology and Circuits (VLSI SYMPOSIUM 2005), pp. 216-219, June 2005.

pdf P. Schaumont, B.C. Lai, W. Qin, I. Verbauwhede, "Cooperative multithreading on embedded multiprocessor architectures enables energy-scalable design," Proc. 2005 Design Automation Conference (DAC 2005), June 2005.

pdf K. Tiri, D. Hwang, A. Hodjat, B.C. Lai, S. Yang, P. Schaumont, I. Verbauwhede, "A Side-Channel Leakage Free Coprocessor IC in .18um CMOS for Embedded AES-Based Cryptographic and Biometric Processing," Proc. 2005 Design Automation Conference (DAC 2005), June 2005.

pdf O. Villa, P. Schaumont, I. Verbauwhede, M. Monchiero, G. Palermo, "Fast dynamic memory integration in co-simulation frameworks for multiprocessor system on-chip," Proc. Design Automation and Test Conference in Europe (DATE 2005), pp. 804-805, March 2005.

pdf H. Chan, P. Schaumont, I. Verbauwhede, "A secure multithreaded coprocessor interface," 3th Workshop on Optimizations for DSP and Embedded Systems, March 2005.

2004

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B.C. Lai, P. Schaumont, and I. Verbauwhede, "CT-Bus: A heterogeneous CDMA/TDMA bus for future SOC," Proc. 38th Asilomar Conference on Signals, Systems, and Computers, November 2004.

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Y. Matsuoka, P. Schaumont, K. Tiri, and I. Verbauwhede, "Java cryptography on KVM and its performance and security optimization using HW/SW co-design techniques," Proc. Int. Conference on Compilers, Architecture, and Synthesis for Embedded Systems (CASES 2004), pp. 303-311, September 2004.

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I. Verbauwhede, P. Schaumont, "The Happy Marriage of Architecture And Application in next-generation Reconfigurable Systems," ACM Computing Frontiers 2004, April 2004.

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P. Schaumont, K. Sakiyama, A. Hodjat, I. Verbauwhede, "Embedded software integration for coarse-grain reconfigurable architectures," 2004 Reconfigurable Architectures Workshop (RAW 2004), April 2004 errata

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D. Ching, P. Schaumont, I. Verbauwhede, "Integrated Modeling and Generation of A Reconfigurable Network-On-Chip," 2004 Reconfigurable Architectures Workshop (RAW 2004), April 2004.

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A. Hodjat, P. Schaumont, I. Verbauwhede, "Architectural design features of a programmable high throughput AES coprocessor," IEEE International Conference on Information Technology (ITCC 2004), April 2004.

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I. Verbauwhede, C. Piguet, P. Schaumont, B. Kienhuis, "Architectures and Design Techniques for Energy Efficient Embedded DSP and Multimedia," 2004 Design Automation and Test in Europe (DATE 2004), February 2004.

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P. Schaumont, I. Verbauwhede, "Interactive cosimulation with partial evaluation," 2004 Design Automation and Test in Europe (DATE 2004), February 2004.

2003

pdf P. Schaumont, I. Verbauwhede, "Domain-specific co-design for embedded security," IEEE Computer, April 2003.

pdf I. Verbauwhede, P. Schaumont, H. Kuo "Design and performance testing of a 2.29 Gb/s Rijndael Processor," IEEE Journal of Solid-State Circuits, pp. 569-572, March 2003.

pdf P. Schaumont, I. Verbauwhede, "ThumbPod puts security under your Thumb," Xilinx Xcell Online, Winter 2003.

pdf P. Schaumont, K. Sakiyama, Y. Fan, D. Hwang, B. Lai, A. Hodjat, S. Yang, I. Verbauwhede, "Testing ThumbPod: softcore bugs are hard to find," IEEE International High Level Design Validation and Test Workshop (HLDVT), November 2003.

pdf D. Hwang, P. Schaumont, Y. Fan, A. Hodjat, B.C. Lai, K. Sakiyama, S. Yang, I. Verbauwhede, "Design flow for HW / SW acceleration transparency in the ThumbPod secure embedded system," 2003 Design Automation Conference, pp. 60-65, Los Angeles, June 2003.

pdf K. Sakiyama, P. Schaumont, D. Hwang, I. Verbauwhede, "Teaching trade-offs in system-level design methodologies," Proc. International COnference on Microelectronic Systems Education 2003 (MSE2003), pp. 64-65, June 2003.

pdf K. Sakiyama, P. Schaumont, I. Verbauwhede, "Finding the best system design flow for a high-speed JPEG encoder," Asia and South Pacific Design Automation Conference (ASP-DAC 2003), pp. 577-578, KitakYushu, Japan, January 2003.

2002

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P. Schaumont, I. Verbauwhede, "Domain-specific tools and methods for application in security processor design," Kluwer Journal for Design Automation of Embedded Systems, pp. 365-383, November 2002.

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Y. Ha, S. Vernalde, P. Schaumont, M. Engels, R. Lauwereins, H. De Man, "Building a Virtual Framework for Networked Reconfigurable Hardware and Software Objects," Journal of Supercomputing Vol. 21, No.2, pp.131-144, February 2002.

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P. Schaumont, H. Kuo, I. Verbauwhede, "Unlocking the design secrets of a 2.29 Gb/s Rijndael encryption processor," 39th Design Automation Conference (DAC 2002), pp. 634-639, New Orleans, June 2002. Student Design Contest Winner, 1st place, operational category.

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H. Kuo, P. Schaumont, I. Verbauwhede, "A 2.29 Gbits/sec, 56 mW non-pipelined Rijndael AES encryption IC in a 1.8 V, 0.18 um CMOS technology.," 2002 IEEE Custom Integrated Circuits Conference (CICC), pp. 302-309, Orlando, May 2002.

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D. Desmet , P. Avasare , P. Coene , S. Decneut , F. Hendrickx , T. Marescaux , J. Mignolet , R. Pasko , P. Schaumont , D. Verkest "Design of Cam-E-leon, a Run-Time Reconfigurable Web Camera," Embedded Processor Design Challenges : Systems, Architectures, Modeling, and Simulation - SAMOS, Lecture Notes on Computing Science (LNCS) 2268, April 2002.

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R. Pasko, S. Vernalde, P. Schaumont, "Techniques to evolve a C++ based system design language," Design, Automation and Test in Europe Conference and Exhibition (DATE 2002), pp. 302-309, March 2002.

2001

pdf R. Pasko, L. Rynders, P. Schaumont, S. Vernalde, D. Durackova, "High Performance Flexible All-Digital Quadrature Up- and Down Converter Chip," IEEE Journal of Solid State Circuits, pp. 408-416, March 2001.

pdf D. Verkest, P. Avasare, P. Coene, S. Decneut, D. Desmet, F. Hendrickx, T. Marescaux, J. Mignolet, P. Schaumont, R. Pasko, "Design of a Secure, Intelligent, and Reconfigurable Web Cam using a C Based System Design Flow," Asilomar 2001 Conference on Signals, Systems and Computers, pp. 463-467, Pacific Grove, CA, November 2001.

pdf P. Schaumont, I. Verbauwhede "A reconfiguration hierarchy for elliptic curve cryptography," Thirty-Fifth Asilomar Conference on Signals, Systems and Computers, pp. 449-453, Pacific Grove, November 2001.

pdf F. Doucet, R. Gupta, M. Otsuka, P. Schaumont, S. Shukla, "Interoperability as a design issue in C++ based modeling environments," 14th International Symposium on System Synthesis, 2001, pp. 87-92, October 2001.

pdf Y. Ha, S. Vernalde, P. Schaumont, M. Engels, H. De Man, "Building a Virtual Framework for Networked Reconfigurable Hardware and Software Objects," International Conference on Parallel and Distributed Processing Techniques and Applications 2001 (PDPTA 2001), Las Vegas, June 2001.

pdf P. Schaumont, I. Verbauwhede, K. Keutzer, M. Sarrafzadeh, "A quick safari through the reconfiguration jungle," 38th Design Automation Conference (DAC 2001), pp. 172-177, Las Vegas, June 2001.

pdf R. Cmar, R. Pasko, J.-Y. Mignolet, G. Vanmeerbeeck, P. Schaumont, S. Vernalde, "Platform design approach for re-configurable network appliances," Custom Integrated Circuits, pp. 79-82, Orlando, May 2001.

pdf D. Verkest, W. Eberle, P. Schaumont, B. Gyselinckx, S. Vernalde "C++ based system design of a 72 Mb/s OFDM transceiver for wireless LAN," Custom Integrated Circuits Conference (CICC 2001), pp. 433-439, May 2001.

pdf G. Vanmeerbeeck, P. Schaumont, S. Vernalde, M. Engels, I. Bolsens, "Hardware/software partitioning of embedded system in OCAPI-xl," Proceedings of the Ninth International Symposium on Codesign (CODES), pp. 30-35, April 2001.

pdf Y. Ha, B. Mei, P. Schaumont, S. Vernalde, R. Lauwereins, H. De Man, "Development of a Design Framework for Platform-Independent Networked Reconfiguration of Software and Hardware," Proc. Field-Programmable Logic Conference 2001 (FPL 2001), pp. 264-274, Belfast, UK.

pdf Y. Ha, P. Schaumont, S. Vernalde, R. Lauwereins, H. De Man, "SW/HW Interface API for Java/FPGA Co-designed Applets," Proc. Field-Programmable Customg Computing Machines 2001 (FCCM 2001),

pdf Y. Ha, G. Vanmeerbeeck, P. Schaumont, S. Vernalde, M. Engels, H. De Man, "Virtual Java/FPGA Interface for Networked Reconfiguration," Proc. ASP-DAC, pp. 558-563, Japan, January 2001.

Before 2001

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L. Rynders, P. Schaumont, S. Vernalde, I. Bolsens, "High level analysis of clock regions in a C++ system description," IEICE Transactions on Fundamentals of Electronics Communications and Computer Sciences, December 2000, VE83A(N12):2631-2632

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R. Pasko, R. Cmar, P. Schaumont, S. Vernalde, "Functional Verification of an Embedded Network Component by Co-Simulation with a Real Network," Proc. IEEE International High Level Design Validation and Test Workshop (HLDVT00), pp. 64-67, Berkeley, CA, USA, November 2000.

pdf B. Mei, P. Schaumont, S. Vernalde, "A Hardware-Software Partitioning and Scheduling Algorithm for Dynamically Reconfigurable Embedded Systems," Proc. PRORISC Workshop, Veldhoven, The Netherlands, November 2000.

pdf Y. Ha, P. Schaumont, M. Engels, S. Vernalde, F. Potargent, L. Rijnders, H. De Man, "A Hardware Virtual Machine to Support Networked Reconfiguration," Proc. IEEE International Workshop on Rapid System Prototyping (RSP00), p. 194-9, Paris, France, June 2000.

pdf R. Pasko, L. Rijnders, P. Schaumont, S. Vernalde, D. Durackova, "High Performance Flexible All-Digital Quadrature Up- and Down Converter Chip," Proc. IEEE Custom Integrated Circuits Conference (CICC00), pp. 43-46, Orlando, FL, USA, May 2000.

L. Rijnders, P. Schaumont, S. Vernalde, "High Level Clock Region Design of Digital Circuits," Proc. Workshop on Synthesis and System Integration of Mixed Technologies (SASIMI00), Kyoto, Japan, April 2000.

pdf C. Lennard, P. Schaumont, G. de Jong, A. Haverinen, P. Hardee, "Standards for System-level Design: Practical Reality or Solution in Search of a Question ?," Hot Topic Session Proc. Design, Automation and Test in Europe (DATE00), pp. 90-96, Paris, France, March 2000.

pdf Y. Ha, P. Schaumont, L. Rijnders, S. Vernalde, F. Potargent, M. Engels, H. De Man, "A scalable architecture to support networked reconfiguration," Proc. PRORISC Workshop, pp. 677-83, Mierlo, The Netherlands, November 1999.

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P. Schaumont, R. Cmar, S. Vernalde, M. Engels, I. Bolsens, "Hardware Reuse at the Behavioral Level," Proc. Design Automation Conference (DAC99), pp. 784-789, New Orleans, CA, USA, June 1999, Nominated Best Paper.

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P. Schaumont, R. Cmar, S. Vernalde, M. Engels, "A 10 Mbit/s Upstream Cable Modem with Automatic Equalization," Proc. Design Automation Conference (DAC99), pp. 337-340, New Orleans, LA, USA, June 1999, Design Contest Finalist.

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S. Vernalde, P. Schaumont, I. Bolsens, "An Object Oriented Programming Approach for Hardware Design," Proc. IEEE Computer Society Workshop on VLSI, pp. 68-73, Orlando, FL, April 1999.

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R. Cmar, L. Rijnders, P. Schaumont, S. Vernalde, I. Bolsens, "A Methodology and Design Environment for DSP ASIC Fixed Point Refinement," Design, Automation and Test in Europe (DATE99), pp. 271-276, Munich, Germany, March 1999.

pdf R. Pasko, P. Schaumont, V. Derudder, S. Vernalde, D. Durackova, "A new algorithm for Elimination of Common Subexpressions," IEEE Transactions on Computer Aided Design of Integrated Circuits and Systems, 18(1):58-68, January 1999.

pdf P. Schaumont, S. Vernalde, M. Engels, I. Bolsens, "Low Power Digital Frequency Conversion Architectures," Kluwer Journal of VLSI Signal Processing, pp. 187-197, February 1998.

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P. Schaumont, S. Vernalde, L. Rijnders, M. Engels, I. Bolsens, "A Programming Environment for the Design of Complex High Speed ASICs," Proc. Design Automation Conference (DAC98), pp. 315-320, San Francisco, CA, USA, June 1998.

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P. Schaumont, G. Vanmeerbeeck, E. Watzeels, S. Vernalde, M. Engels, I. Bolsens, "A Technique for Combined Virtual Prototyping and Hardware Design," Proc. IEEE International Workshop on Rapid System Prototyping (RSP98), pp. 156-161, Leuven, Belgium, June 1998.

pdf P. Schaumont, B. Vanthournout, I. Bolsens, H. De Man, "Synthesis of Pipelined DSP accelerators with Dynamic Scheduling," IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 5-1, pp. 59-68, March 1997.

pdf R. Pasko, P. Schaumont, V. Derudder, D. Durackova, "Optimization Method for Broadband Modem FIR Filter Design using Common Subexpression Elimination," 10th International Symposium on System Synthesis (ISSS97), pp. 100-106, Antwerp, Belgium, September 1997.

pdf J. Maris, P. Schaumont, S. Vernalde, M. Engels, I. Bolsens, "Dynamical analysis of all-digital symbol timing recovery in twisted pair broadband receivers," Digital Signal Processing Proceedings, 1997 (DSP 97), pp. 1055-1058, July 1997.

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P. Schaumont, S. Vernalde, M. Engels, I. Bolsens, "Synthesis of Multi-Rate and Variable Rate Circuits for High Speed Telecommunications Applications," Proc. European Design and Test Conference (EDTC97), pp. 542-546, Paris, France, March 1997.

pdf P. Vandaele, M. Moonen, P. Schaumont, W. Trog, K. De Meyer, "Low Complexity Algorithms for Burstmode Communication in Upstream CATV networks," Proc. PRORISC Workshop, The Netherlands, November 1996.

pdf S. Vernalde, P. Schaumont, M. Engels, I. Bolsens, "Design Space Exploration of All-Digital Symbol Timing Adjustment Architectures," IEEE Fourth Symposium on Communications and Vehicular Technology in the Benelux, pp. 88-93, Gent, Belgium, October 1996.

pdf P. Schaumont, S. Vernalde, M. Engels, I. Bolsens, "Digital Upconversion Architecture for Quadrature Modulators," IEEE Workshop on VLSI Signal Processing, pp. 315-324, San Francisco, CA, USA, October 1996.

pdf R. Lauwereins, M. Ade, P. Vandaele, M. Moonen, P. Schaumont, "Prototyping Quadrature Amplitude Modulation for Two-Way Communication on CATV networks," 7th Int. Conference on Signal Processing Applications and Technology ICSPAT, pp. 1570-1574, Boston, MA, USA, October 1996.

pdf P. Schaumont, B. Vanthournout, I. Bolsens and H. De Man, "Synthesis of Pipelined DSP accelerators with Dynamic Scheduling," Proc. International Symposium on System Synthesis (ISSS95), pp. 72-77, Cannes, 1995.

Recent Presentations

"Long-term Security from Fast-paced Technology," invited talk at Xilinx Emerging Technologies Symposium 2014, San Jose, CA, February 204.

"Hardware/Software Co-design for Cryptography: Balancing Performance and Risk," invited talk at Intel Software Professionals Conference 2013, Hillsboro, OR, October 2013.

pdf "Three Design Dimensions of Secure Embedded Systems," invited talk at Third International Conference on Security, Privacy, and Applied Cryptography Engineering (SPACE 2013), Kharagpur, India, October 2013.

pdf "Don't talk to strangers (without authentication)," CESCA Seminar, Virginia Tech, October 2013.

pdf "Authenticating Microcontrollers," Summer School on Design and Security of Cryptographic Functions, Algorithms and Devices, Albena, Bulgaria, July 2013.

pdf "Hardware Design for Cryptographers," Summer School on Design and Security of Cryptographic Functions, Algorithms and Devices, Albena, Bulgaria, July 2013.

" Building Better Hardware for the Elliptic Curve Discrete Logarithm Problem," ECE Department Seminar at University of Connecticut, Storrs, CT, February 2012.

"Fault Attacks and Side Channel Analysis on Cryptographic Hardware," Guest Lecture at Prof. Burleson's Security Engineering class at University of Massachusetts, Amherst, MA, February 2012.

pdf "Moving PUFs out of the lab," COSIC Seminar at Katholieke Universiteit Leuven, February 2012. Also given as a CESCA seminar, February 2012.

pdf "Specialized Machines for Ccryptanalysis: 2 examples, 60 years apart," 2011 CESCA Seminar, VA, February 2011.

pdf "How to enjoy the variability of your FPGA," 2010 Dagstuhl Seminar on Dynamically Reconfigurable Architectures, Wadern, Germany, July 2010.

"Trustworthy, High-Performance Cryptography on Embedded Multi-core Systems," 2010 Lockheed Martin Fellows Conference, Atlanta, GA, May 2010.

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"Secure Embedded Systems: A Software-Hardware Symbiosis," CS Department, Virginia Tech, April 2010.

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"Engineering On-chip Thermal Effects," Dagstuhl Seminar on Foundations for Forgery-resilient Cryptographic Hardware, Saarbrucken, Germany, July 2009.

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"Teaching Hardware/Software Codesign to the next generation of Computer Engineers", CS Department, University of California at Riverside, June 2008.

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"The embedded security challenge: Protecting bits-at-rest", 2007 ECE Department, George Mason University, June 2007.

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"Secure Design Methodology and the Tree of Trust", 2007 ECRYPT Workshop on Secure Embedded Implementations, Friday workshop at the Design Automation and Test in Europe (DATE) Conference, Nice, France, 2007.

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"Secure Integration of Cryptographic Primitives", 2006 ECRYPT Summer School on Cryptographic Hardware, Side-channel, and Fault-attacks, Louvain-La-Neuve, Belgium, 2006.

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"System Level Design Methods for Secure Embedded Systems", 2005 Workshop on CRyptographic Advances in Secure Hardware (CRASH), Leuven, Belgium, 2005.

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"Hardware Platform Design and Evaluation using GEZEL", CSE Department, Penn State University, PA, 2005.

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"Challenges for the Logic Design of Secure Embedded Systems", 2005 Internal Workshop on Logic and Synthesis, Lake Arrowhead, CA, 2005.

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