ECE: Electrical & Computer Engineering
ECE News

CESCA Seminar: “Extremely High Mobility CMOS Logic”

2:30 PM - 3:30 PM on Friday, March 21, 2014
Location: Lavery Hall 320

Talk by Prof. Mantu K. Hudait, ECE Department, Virginia Tech

Abstract:

Shrinking feature sizes of CMOS transistor has enabled increase in transistor densities and this rising number of transistors increases the power consumption in ICs. Thus, the computing power is primarily constrained by power consumption and high-speed operation. Low-power consumption would imply lower heat dissipation, prolonged battery life and reduced cooling requirements, which all add up to significant reductions in cost and energy savings. Going forward, transistor scaling will require the introduction of new high mobility channel materials, including III-V and Ge, novel device architectures (quantum well or 3D FinFET) and their heterogeneous integration on highly dense Si CMOS could be a key enabler for lowering power consumption and enhance performance of microprocessor technology. Beyond sub 22 nm technology node, high mobility III-V materials and new device architectures have the potential to provide higher switching speeds and to operate at lower voltage <0.5V than Si FETs. Heterogeneous integration of such high mobility materials with transformative device and circuit architectures configuration have recently emerged a promising option for ultra-high speed and low voltage operation. In this talk, I will present the recent development of the heterogeneous integration of compound semiconductors for n-channel and Ge for p-channel on Si, and mixed As/Sb based staggered gap tunnel transistors research from our group.

Speaker:

Dr. Mantu Hudait is an Associate Professor in the Bradley Department of Electrical and Computer Engineering (ECE), Virginia Tech. Prior joining at Virginia Tech, he was a Senior Engineer in the Intel Corporation's Advanced Transistor and Nanotechnology Group. His research at Virginia Tech focuses on next generation nanoscale transistors for low power and high-speed devices as well as multijunction solar cells on low cost silicon substrate. He work was press release in 2007 and 2009 and received two Divisional Recognition Awards from Intel Corporation, 43 US Patents issued, and over 135 technical publications. Dr. Hudait’s teaching focuses on integrating research and industry experience into the curriculum. He is a Senior Member of the IEEE, AVS member and ASEE member.

Advanced Devices & Sustainable Energy Laboratory (ADSEL)
Bradley Department of Electrical and Computer Engineering
Virginia Tech, Blacksburg, VA 24061
E-mail: mantu.hudait@vt.edu;
http://adsel.ece.vt.edu

Contact: chaowang@vt.edu