exit bar

 


Fall 1999

 

 

Tech Researchers Develop Techniques for 6x Better Power Density

Top: The new CPES QSW VRM. Bottom: A conventional voltage regulator.

 

Department researchers have devised a new power electronics technique that will help microprocessor firms develop ultra-low-voltage, high-speed processors that break the speed and size barriers imposed by today's technology.

The new technique was developed with an industrial consortium and has quickly gained commercial acceptance.

The novel voltage regulator module (VRM) developed by the Center for Power Electronics Systems (CPES) achieves a five times faster transient response and a six times improvement in power density than conventional regulators.

Improving transient response and density is critical to semiconductor manufacturers seeking to develop ultra-low-voltage, high-speed processors, according to Fred Lee, CPES director. "Today's chips are limited in capacity by their voltage," he explained, "and by the speed at which power can be transferred."

The new CPES interleaved Quasi-Square-Wave (QSW) VRM is based on a distributed power system in which the voltage regulator is located physically close to the processor. "The traditional centralized power system can no longer meet the challenges of faster, smaller chips," Lee said. "As operating frequency increases, the higher transient current slew rates result in significant voltage transients. We believe the best way to achieve the necessary voltage regulation is with distributed power systems with the VRM integrated into the processor."

The new CPES technique builds a voltage regulator from four different modules that are interleaved. Using this topology, the VRM filter inductance and capacitance are reduced by 10 times, which results in an overall six times improvement in power density. CPES also developed a novel current sharing and sensing technology that can be easily developed as an IC chip. CPES has filed two patent disclosures on the technology.

The VRM program involved several companies from the start: Delta Electronics, Intel, International Rectifier, National Semiconductor, SGS-Thomas Microelectronics, and Texas Instruments.

After the four-module interleaved QWS VRM proved successful in the laboratory, CPES delivered three prototypes to Intel, National Semiconductor and SGS Thomas for evaluation. Subsequently, National Semiconductors has developed a specialized control IC chip. Semtech also has developed a control IC aimed at the four-channel VRM.

The quick commercialization of the technology is a direct result of a strong university/industry partnership, according to Lee. "With VRMs we were jumping to a whole new technology," he explained. "This required groups with different expertise to come together to work on the problem. This early success shows us that our team effort works."

CPES was recently designated an engineering research center (ERC) by the National Science Foundation. The center represents a close collaboration of five universities and more than 70 industrial firms. For more information, visit www.cpes.vt.edu.

 
 
 
 
The Bradley Department of Electrical and Computer Engineering
Virginia Tech


Last Updated, October 15, 1999
Questions or comments about the content: eqb@rightwordonline.com
Technical questions or comments: webmaster@birch.ee.vt.edu
http://www.ece.vt.edu/ecenews/fall99/cpes.html