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Computer Engineering Research
Associated Centers and Laboratories:
Virginia Tech Information
Systems Center (VISC)
Internet Technology
Innovation Center (ITIC)
Virginia
Tech Information Systems Center (VISC)
www.visc.vt.edu
ECE VISC Faculty
Dong S. Ha, Director
A. Lynn Abbott
James R. Armstrong
Peter M. Athanas
James M. Baker
Robert Broadwater
Luiz A. DaSilva
Nathaniel Davis IV
Leonard A. Ferrari
F. Gail Gray
Mark T. Jones
Scott F. Midkiff
Amitabh Mishra
Binoy Ravindran
Associated ECE Faculty
William T. Baumann
Charles E. Nunnally
Joseph G. Tront
Hugh F. VanLandingham
 The Stallion is the second-generation Wormhole Run-time Reconfigurable processor designed in the Configurable Computing Lab, and fabricated through MOSIS using sub-micron technology.
VISC brings together faculty members from electrical and computer
engineering, computer science and other departments with a common
interest in the design and advanced application of information
systems. Information systems include hardware computing and networking
devices, software, and knowledge or data that operate to satisfy
specialized requirements or to provide generalized computational
facilities. Electrical and computer engineering researchers within
VISC conduct multidisciplinary research in a variety of areas,
including computer vision and image processing, computer networks,
system modeling and synthesis, design automation, VLSI design
and testing, configurable computing, and embedded systems.
Computer Vision
Computer vision involves the use of computational systems to
extract information from images or image sequences. In an on-going
project funded by the USDA, for example, VISC researchers are
developing methods for detecting defects in computed tomography
(CT) images of hardwood logs. Systems similar to this one will
ultimately be used in sawmills to determine optimal sawing decisions.
In a separate USDA-sponsored project, VISC researchers have developed
a laser-based scanning system that is used to analyze rough (unplaned)
lumber.
VISC researchers are also interested in high-speed processing
for image-based applications. A current project, sponsored by
BAE Systems, Inc., requires the analysis of image sequences from
an infrared camera. Past projects have included the development
of visual tracking systems using motorized stereo cameras, the
detection of explosives in x-ray images of luggage, and the analysis
of range image data.
Configurable Computing
Configurable computing machines (CCMs), comprising another domain
of research within VISC, are emerging as a technology capable
of providing high computational performance for diverse applications,
including signal processing, simulation, and graphics. High performance
is achieved by rapidly reconfiguring the functionality and connectivity
of the computing resources to match the requirements of the specific
applications. Rapid reconfiguration provides the illusion of
having a very large "virtual" hardware platform. With
this approach, application properties such as parallelism, locality,
and data resolution can be exploited by creating custom operators,
pipelines, and interconnection pathways. Experimental, very large
scale integrated (VLSI) devices similar to field-programmable
gate arrays (FPGAs) are under development. These devices employ
a computing model called wormhole run-time reconfiguration that
improves reconfiguration rates and the computational density
of configurable computing machines.
VLSI
VISC researchers are developing a VLSI system for "smart
antennas" at handsets. Smart antennas, in which two antennas
are deployed in proximity, have been used only at base stations.
A main challenge for embedding smart antennas at handsets is
high power dissipation due to the high computing need. The VLSI
system under development attempts to address the problem through
dynamic system reconfiguration. Another project is to develop
a VLSI system for low bit-rate wireless video communications.
The system has a wide range of applications such as video cellular
phones, Internet access, remote surveillance, and mobile patrols.
The major focus of the VLSI system is low-power dissipation,
so that it can operate for hours or days without recharging the
battery. VISC researchers are also developing WCDMA modem chips
with multimedia capability for the next generation cellular phones.
The modem chips will embed CPU and DSP cores and are estimated
to have three to four million transistors on a single chip. In
addition, VISC researchers conduct research to develop building
blocks for wireless communications such as turbo decoder, Viterbi
decoder, variable analog-to-digital converter, SRAM generator,
and low-power library cells. The research is currently supported
by Advantest Research Laboratories, Lucent Technologies, the
National Science Foundation, and NeoReach Inc.
VHDL
Researchers have also developed methods for the rapid design
of digital signal processing systems. Researchers use the VHDL
hardware description language to develop performance models that
allow design trade-off studies early in the design process and
that can be used later to evaluate proposed design changes. A
computer-aided design (CAD) tool is under development that will
partly automate the partitioning of the software algorithm on
the various processors and automatically move information in
both directions between the partitioning tool and the performance
models.
Researchers have developed a process model graph representation
that is used in a CAD tool, PMG, that allows rapid development
of tests for VHDL structural models.
Researchers are developing a high-level model validation system
in which test bench elements are initially developed using high-level
design tools and refined within a library structure. A test plan
is prepared using a goal tree system schematic capture system.
Specification values are stored in a repository linked to the
test plan and goal tree system and indirectly linked to the test
bench through a requirements interface. All of these individual
elements are integrated to form the test planning system. Graphical
user interfaces provide a friendly front end for test planning
and simulation.
Other hardware design work focuses on low-power design, which
is important for many applications including mobile computing
and communications. The scope of research includes power estimation,
low-power circuit design, and low-power system design.
Networking/Network Applications
Other computer engineering projects investigate networking and
network applications. Goals of this research include improving
the functionality, performance, robustness, and security of networks
and characterizing the performance of new and emerging protocols
and network architectures. Graduate education and research training
in networking are the emphasis of the Integrated Research and
Education in Advanced Networking (IREAN) program funded by an
Integrative Graduate Education and Research Training (IGERT)
grant from the NSF. This $2.55M, five-year program involves faculty
and students from ECE in both Blacksburg and at the Alexandria
Research Institute, as well as from Computer Science, Industrial
and Systems Engineering, Economics, and the College of Business.
Another project, funded by the Office of Naval Research, that
involves faculty and students in Blacksburg and Alexandria, investigates
inter-operability in rapidly deployed networks. This project
is considering wireless and mobility issues, quality of service,
security, and network management. In another project, based at
the ARI, researchers are examining the performance of Internet
protocols over Digital Subscriber Loop (DSL) systems with an
emphasis on quality of service (QoS). QoS guarantees are essential
for providing video, voice, and other real-time services. In
conjunction with the CWT, computer engineering researchers are
investigating rapidly deployable broadband wireless systems with
funding from the NSF's Digital Government program. Computer engineering
faculty also collaborate with the MPRG to look at networking
issues in wireless networks. Computer engineering and other departmental
and university faculty also participate in the Internet Technology
Innovation Center, a four-university partnership funded by Virginia's
Center for Innovative Technology.
Computer engineering faculty are also investigating how networks
and other technologies can be used to improve and extend learning
and collaboration. As part of SUCCEED, an NSF Engineering Education
Coalition, researchers investigate technology-based curriculum
delivery and collaboration. Through projects funded by Virginia
Tech's Center for Innovations in Learning (CIL), computer engineering
faculty and students are developing and teaching online courses
for the Master of Information Technology degree program.
In another multidisciplinary project involving computer engineering
and power engineering, the Distribution Engineering Workstation
(DEW) has been developed over a five-year period for the Electric
Power Research Institute (EPRI). The workstation is currently
being implemented at a number of EPRI member utilities, including
some in other countries, such as Chilquinta Energia in Chile,
South America. Two utilities, Kansas City Power & Light and
Allegheny Power Systems have recently estimated that the use
of the workstation will save, approximately $1 million per
year. The workstation can integrate data from a dozen different
sources within the electric utility, and relate the data via
the power distribution system circuit model. Implementing data
interfaces at a single utility can easily involve cooperation
among IBM mainframe, UNIX and Windows NT computers. Once the
data are connected, the workstation can begin to create valuable
information concerning efficiency, reliability, peak values,
and costs of alternative designs.
Representative Research Projects
in Computer Engineering
A Vision System for Hardwood Sawmill Edging/Trimming of Rough
Lumber
Automated Analysis of CT Images for the Inspection of Hardwood
Logs
Evaluation of Postprocessing Effects in Automated Interpretation
of CT Images for Defect Detection in Hardwood Logs
Automatic Control of Parallax Scanning
Quality of Service Management of Transient Computations in Dynamic
Real-Time Systems
NAVCIITI Distributed Asynchronous Real-Time Systems
REU Supplement: Development of an Efficient Method for Test Data
Compression
Development of Optimal Test and BIST Synthesis Tools
Development of an Efficient Method for Test Data Compression
System-Level Model Validation
Investigation of the Role of PPP Over ATM in the Delivery of
Quality of Service Over Asymmetric Digital Subscriber Lines
Scalable Dynamic Mesh Algorithms and Software
Runtime Support for Efficient RTR
Technical Proposal for Jbits to EDIF Translation
Dynamic Sensor Networks
Seamless Mobile Law Enforcement Computer Network
NAVCIITI Secure Conf. Platform
An Integrated Development Environment for Run-Time Reconfiguration Application Development
An Application Presentation interface for a Scalable Configurable
Computing Environment
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